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Implement GPUSTAT and update IOPort design

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Jaby
2022-09-07 21:45:28 +02:00
parent a2532b03fc
commit d9da876bab
7 changed files with 168 additions and 72 deletions
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76
include/PSX/System/IOPorts/DMA_IO.hpp
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@@ -7,20 +7,20 @@ namespace DMA {
struct __no_align MADR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(MADR);
static constexpr BitRange<uint32_t> MemoryAdr = BitRange<uint32_t>::from_to(0, 23);
static constexpr auto MemoryAdr = BitRange<uint32_t>::from_to(0, 23);
};
struct __no_align BCR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(BCR);
struct __no_align SyncMode0 {
static constexpr BitRange<uint16_t> NumberOfWords = BitRange<uint16_t>::from_to(0, 15);
static constexpr Bit<uint16_t> CD_OneBlock = 16;
static constexpr auto NumberOfWords = BitRange<uint16_t>::from_to(0, 15);
static constexpr auto CD_OneBlock = Bit<uint16_t>(16);
};
struct __no_align SyncMode1 {
static constexpr BitRange<uint16_t> BlockSize = BitRange<uint16_t>::from_to(0, 15);
static constexpr BitRange<uint16_t> BlockAmount = BitRange<uint16_t>::from_to(16, 31);
static constexpr auto BlockSize = BitRange<uint16_t>::from_to(0, 15);
static constexpr auto BlockAmount = BitRange<uint16_t>::from_to(16, 31);
};
struct __no_align SyncMode2 {
@@ -36,26 +36,26 @@ namespace DMA {
Sync2 = 2, //Linked List
};
static constexpr Bit<uint32_t> ManualStart = 28;
static constexpr auto ManualStart = Bit<uint32_t>(28);
static constexpr Bit<uint32_t> Start = 24;
static constexpr auto Busy = Start;
static constexpr auto Start = Bit<uint32_t>(24);
static constexpr auto Busy = Start;
static constexpr BitRange<uint32_t> ChoppingCPUWindowSize = BitRange<uint32_t>::from_to(20, 22);
static constexpr BitRange<uint32_t> ChoppingDMAWindowSize = BitRange<uint32_t>::from_to(16, 18);
static constexpr auto ChoppingCPUWindowSize = BitRange<uint32_t>::from_to(20, 22);
static constexpr auto ChoppingDMAWindowSize = BitRange<uint32_t>::from_to(16, 18);
static constexpr BitRange<_SyncMode> SyncMode = BitRange<_SyncMode>::from_to(9, 10);
static constexpr auto UseSyncMode0 = (SyncMode << Sync0);
static constexpr auto UseSyncMode1 = (SyncMode << Sync1);
static constexpr auto UseSyncMode2 = (SyncMode << Sync2);
static constexpr auto SyncMode = BitRange<_SyncMode>::from_to(9, 10);
static constexpr auto UseSyncMode0 = SyncMode.with(Sync0);
static constexpr auto UseSyncMode1 = SyncMode.with(Sync1);
static constexpr auto UseSyncMode2 = SyncMode.with(Sync2);
static constexpr Bit<uint32_t> UseChopping = 8;
static constexpr auto UseChopping = Bit<uint32_t>(8);
static constexpr Bit<uint32_t> MemoryAdrDecreaseBy4 = 1;
static constexpr auto MemoryAdrIncreaseBy4 = !MemoryAdrDecreaseBy4;
static constexpr auto MemoryAdrDecreaseBy4 = Bit<uint32_t>(1);
static constexpr auto MemoryAdrIncreaseBy4 = !MemoryAdrDecreaseBy4;
static constexpr Bit<uint32_t> FromMainRAM = 0;
static constexpr auto ToMainRAM = !FromMainRAM;
static constexpr auto FromMainRAM = Bit<uint32_t>(0);
static constexpr auto ToMainRAM = !FromMainRAM;
static constexpr CHCHR StartMDECin() {
return CHCHR(0x01000201);
@@ -96,36 +96,36 @@ namespace DMA {
struct __no_align DMAControlRegister : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(DMAControlRegister);
static constexpr Bit<uint32_t> OTCEnable = 27;
static constexpr BitRange<Priority> OTCPriority = BitRange<Priority>::from_to(24, 26);
static constexpr auto OTCEnable = Bit<uint32_t>(27);
static constexpr auto OTCPriority = BitRange<Priority>::from_to(24, 26);
static constexpr Bit<uint32_t> PIOEnable = 23;
static constexpr BitRange<Priority> PIOPriority = BitRange<Priority>::from_to(20, 22);
static constexpr auto PIOEnable = Bit<uint32_t>(23);
static constexpr auto PIOPriority = BitRange<Priority>::from_to(20, 22);
static constexpr Bit<uint32_t> SPUEnable = 19;
static constexpr BitRange<Priority> SPUPriority = BitRange<Priority>::from_to(16, 18);
static constexpr auto SPUEnable = Bit<uint32_t>(19);
static constexpr auto SPUPriority = BitRange<Priority>::from_to(16, 18);
static constexpr Bit<uint32_t> CDROMEnable = 15;
static constexpr BitRange<Priority> CDROMPriority = BitRange<Priority>::from_to(12, 14);
static constexpr auto CDROMEnable = Bit<uint32_t>(15);
static constexpr auto CDROMPriority = BitRange<Priority>::from_to(12, 14);
static constexpr Bit<uint32_t> GPUEnable = 11;
static constexpr BitRange<Priority> GPUPriority = BitRange<Priority>::from_to(8, 10);
static constexpr auto GPUEnable = Bit<uint32_t>(11);
static constexpr auto GPUPriority = BitRange<Priority>::from_to(8, 10);
static constexpr Bit<uint32_t> MDECoutEnable = 7;
static constexpr BitRange<Priority> MDECoutPriority = BitRange<Priority>::from_to(4, 6);
static constexpr auto MDECoutEnable = Bit<uint32_t>(7);
static constexpr auto MDECoutPriority = BitRange<Priority>::from_to(4, 6);
static constexpr Bit<uint32_t> MDECinEnable = 3;
static constexpr BitRange<Priority> MDECinPriority = BitRange<Priority>::from_to(0, 2);
static constexpr auto MDECinEnable = Bit<uint32_t>(3);
static constexpr auto MDECinPriority = BitRange<Priority>::from_to(0, 2);
};
struct __no_align DMAInterruptRegister : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(DMAInterruptRegister);
static constexpr Bit<uint32_t> MasterEnable = 31;
static constexpr BitRange<uint32_t> Flags = BitRange<uint32_t>::from_to(24, 30);
static constexpr Bit<uint32_t> MasterEnableDPCR = 23;
static constexpr BitRange<uint32_t> EnableDPCR = BitRange<uint32_t>::from_to(16, 22);
static constexpr Bit<uint32_t> ForceIRQ = 15;
static constexpr auto MasterEnable = Bit<uint32_t>(31);
static constexpr auto Flags = BitRange<uint32_t>::from_to(24, 30);
static constexpr auto MasterEnableDPCR = Bit<uint32_t>(23);
static constexpr auto EnableDPCR = BitRange<uint32_t>::from_to(16, 22);
static constexpr auto ForceIRQ = Bit<uint32_t>(15);
};
__declare_io_port_global(Registers, MDECin, 0x1F801080);