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DMA SPU memory

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jaby
2024-09-16 21:52:27 +02:00
parent 2f0d972a2a
commit efd887268b
6 changed files with 54 additions and 12 deletions
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5
src/Library/internal-include/SPU/spu_internal.hpp
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@@ -8,6 +8,7 @@ namespace JabyEngine {
struct DMA {
static void wait() {
DMA_IO::SPU.wait();
while(SPU_IO::StatusRegister.read().is_set(SPU_IO_Values::StatusRegister::TransferBusy));
}
static void end() {
@@ -16,9 +17,9 @@ namespace JabyEngine {
struct Receive {
static void prepare() {
end();
SPU_IO::DataTransferControl.write(SPU_IO::DataTransferControl::NormalTransferMode());
SPU_IO::ControlRegister.set_transfer_mode(SPU_IO::ControlRegister::Stop);
SPU_IO::ControlRegister.set_transfer_mode(SPU_IO::ControlRegister::DMAWrite);
}
static void set_src(uintptr_t adr) {
@@ -27,9 +28,9 @@ namespace JabyEngine {
static void set_dst(SPU::SRAM_Adr adr) {
SPU_IO::SRAMTransferAdr.write(adr);
SPU_IO::ControlRegister.set_transfer_mode(SPU_IO::ControlRegister::DMAWrite);
}
// Not adjusted yet
static void start(uint16_t blockCount, uint16_t wordsPerBlock = 0x10) {
using SyncMode1 = DMA_IO::BCR::SyncMode1;